1. Field of the Invention
The present invention relates to a decoding device, and more particularly, a video decoding device of a digital TV receiver.
2. Background of the Related Art
A moving pictures expert group (hereinafter xe2x80x9cMPEGxe2x80x9d) standard is recommended as an international standard for compressing and encoding of a digital moving video, preferably in a multimedia environment including digital versatile discs (DVDs) and digital TVs. Particularly, in current digital TVs, a high definition (hereinafter xe2x80x9cHDxe2x80x9d) grade of MPEG compression and restoration is accepted as a standard. Hence, an existing National Television System Committee (hereinafter xe2x80x9cNTSCxe2x80x9d) system type analog TV will be replaced with the digital TV.
Since the price of the HDTV is expensive at the start of the market initiation, a user""s demand for a standard definition (hereinafter, referred to as xe2x80x9cSDxe2x80x9d) grade of TV will continue for a long period of time during the replacement of the NTSC type analog TV with the HDTV. The SD grade of TV, e.g., SDTV means a TV, or a settop box, which down-converts an HD grade of signal to display the down-converted signal on an SD grade of monitor, will be widely used. In addition to the HD grade of signal, the SDTV can receive the SD grade of signal. A standard for distinguishing the HD grade of signal and the SD grade of signal is dependent upon the number of picture elements (pels) which influences the determination of the video representation performance (a quality of image).
For instance, the SDTV or the settop box down-converts 1920 pels by 1080 lines 60 Hz interlaced scanning of the HD grade of signal to 720 pels by 480 lines 60 Hz interlaced scanning of the SD grade of signal, thus to display the down-converted HD grade of signal. Of course, the SDTV can display the 720 pels by 480 lines 60 Hz interlaced scanning of the SD grade of signal, without any conversion.
FIG. 1 is a block diagram illustrating a video decoding device in a digital HDTV receiver in the background art. In the typical video decoding device, one pel consists of 8 bits, one macroblock has data structure of 16xc3x9716 pels, and the bitstream having the corresponding level to each grade which contains motion vector information is processed.
A variable length decoder (hereinafter xe2x80x9cVLDxe2x80x9d) 101 performs a variable length decoding for bitstream of data inputted and divides the decoded result into motion vectors, quantizing values, and discrete cosine transform (hereinafter xe2x80x9cDCTxe2x80x9d) coefficients. An inverse quantizer (hereinafter xe2x80x9cIQxe2x80x9d) 102 performs an inverse quantization for the DCT coefficients outputted from the VLD 101 and outputs the inverse-quantized result to an inverse DCT (hereinafter xe2x80x9cIDCTxe2x80x9d) 103.
The IDCT 103 performs an inverse DCT on the inverse-quantized DCT coefficients and outputs the IDCT processed result to an adder 104. The adder 104 adds motion compensated data to the IDCT processed data to thereby restore the added data to the complete video and then stores the restored video in a frame memory 106. The restored video signal is outputted for display and simultaneously fed back to a motion compensator 105 for the motion compensation. The motion compensator 105 outputs an appropriate pel value of the frame memory 106 to the adder 104 by using the motion vectors outputted from the VLD 101.
For the HDTV receiver, the video decoding device receives and restores the HD grade of data and also receives and decodes the SD grade of data, without any problem. However, the video decoding device of the SDTV receiver can receive and restore the SD grade of data without any problem, but the SDTV requires conversion of the HD grade of data to the SD grade of data. In other words, the video decoding device of the SD grade of TV receiver performs data conversion of the HD grade of data into the SD grade of data. The data conversion process is completed through downsampling, i.e., filtering/decimation.
FIG. 2 is a block diagram illustrating the video decoding device of the SD grade of TV receiver for such a conversion. The data block size of 8xc3x978 (shown as 201) is reduced to data block size of 4xc3x974. An IDCT/downsampler 202 performs the inverse discrete cosine transform for the vertical 8 pels in the data block size of 8xc3x978 and for the horizontal 4 pels therein, to thereby reduce the data block size of 8xc3x978 to the data block size of 8xc3x974.
The thirty-two DCT coefficients, as shown by the black dot from the upper end of the data block 201, are selected, and the inverse discrete cosine transform is performed to the 8xc3x974 size of data block for the selected coefficients, thereby obtaining the downsampled image data. The coefficients in the data block size of 8xc3x978 indicated by the white dots are discarded. As can be appreciated by one of ordinary skill, the methods of selecting the coefficients may vary.
The image data which is downsampled to the data block size of 8xc3x974 is stored to a frame (or field) memory 204 through an adder 203. To perform motion compensation, the image data of the frame memory 204 is horizontally upsampled to the data block size of 8xc3x978 in an upsampler 205. The upsampled image data is motion-compensated in a motion compensating circuit 206 by using the motion vectors information. Since the compensated data has the data block size of 8xc3x978, a downsampler 207 performs a horizontal downsampling for the compensated data to a block size 8xc3x974. As a result, the data downsampled to the block size of 8xc3x974 is added to the adder 203. Accordingly, the adder 203 outputs a desired video, e.g., the video downsampled to the data block size of 8xc3x974.
The output value of the frame memory 204 is vertically downsampled to the data block size of 4xc3x974 in a downsampler 208. The downsampled data is outputted to a format converter 209, which converts the downsampled data block size of 4xc3x974 to be matched with the required size and aspect ratio to generate a final video output.
For example, assuming that the input video is the HD grade of 1080 lines and 1920 pels per line, the IDCT/downsampler 202 outputs 1080 lines and 960 pels per line and the downsampler 208 outputs 540 lines and 960 pels per line. Finally, the format converter 209 outputs 480 lines and 720 pels per line.
However, the conventional decoding device of the SD grade of digital TV receiver has various disadvantages. For example, since the HD grade of data is downsampled horizontally to xc2xd size, the size of the frame memory is reduced to xc2xd compared to the HD grade of decoder. Hence, the existing SD grade of decoder needs 4,590 kByte size memory which is half of the 9,180 kByte size memory of the HD grade of decoder. However, the 4,590 kByte size of the SDTV video decoder is larger than the standard 4 MByte DRAM, which increases cost.
An object of the present invention is to at least obviate one or more of the problems due to limitations and disadvantages of the related art or other conventional art.
Another object of the present invention is to decrease the memory size.
A further object of the present invention is to use standard memory size.
A further object of the invention is to convert HD signals to SD signals.
Still another object of the present invention is to decrease costs.
Another object of the invention is to provide a video decoding device of a digital TV receiver which separates pictures I and P from a picture B, downsamples each of the separated pictures and converts the downsampled pictures into a display size matched to a screen size and format, thus to have a small size of frame memory.
The present invention can be achieved in a whole or in parts by a video decoding device of a digital TV receiver that converts the picture B which is not an anchor frame into the display size matched to a screen aspect ratio and performs data encoding for the converted picture to thereby store the encoded result in a memory, and on the other hand, it performs data encoding for the pictures I and P to store the encoded result in the memory, whereby memory capacity required therein can be reduced.
The present invention can be achieved in a whole or in parts by a video decoding device of a digital TV receiver is that outputs the picture B after completion of data decoding and outputs the pictures I and P after completion of the data decoding and format conversion to an adequate screen size and aspect ratio, whereby the memory capacity required therein can be reduced and a high quality of picture can be ensured.
The present invention can be achieved in a whole or in parts by a device for a television that converts a first data format to a final data format, comprising a decoder circuit that receives the first data format at an input port and decodes the first data format to output a second data format and the final data format at first and second output ports; an encoder circuit that receives the second data format at an input port and encodes the second data format to output a third data format at an output port; and a memory coupled to the decoder and encoder, the memory storing the third data format received from the encoder and providing the third data format to said decoder circuit for decoding into the final data format.
The present invention can be achieved in a whole or in parts by a television receiver comprising a tuner for selecting a prescribed transmitted signal received via an antenna; a decoder for decoding a signal selected by the tuner into a bitstream of a first data format; a device that converts the first data format to a final data format; a display for displaying an image based on the final data format, wherein the device includes a decoder circuit that receives the first data format at an input port and decodes the first data format to output a second data format and the final data format at first and second output ports; an encoder circuit that receives the second data format at an input port and encodes the second data format to output a third data format at an output port; and a memory coupled to the decoder and encoder, the memory storing the third data format received from the encoder and providing the third data format to said decoder circuit for decoding into the final data format.
The present invention can be achieved in a whole or in parts by a method of decoding an input data of a television receiver, comprising the steps of downsampling the input data in a unit of block at a predetermined ratio; dividing the downsampled result into a first group of data and a second group of data and after downsampling the first group of data, performing screen format conversion of the downsampled first group of data for a display size and aspect ratio; storing in a memory each of the converted first group of data and the second group of data; downsampling the second group of data to correspond with the first group of data to thereby perform screen format conversion for the downsampled second group of data; and outputting the first and second groups of data when the second group of data is reproduced.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.